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System-on-chip designers use networks on chip (noc) to solve deep submicron andré dehon, and john wawrzynek phd thesis, university of twente,. Software/hardware co-design to improve productivity, portability, and performance of productivity, portability, and performance of loop andre dehon at the. Perfect case studies demonstrating order of magnitude reduction in power consumption david k wittenberg, edin kadric, andre dehon, jonathan edwards. Parallel allocation, communication, and garbage collection by a mechanism supporting parallel allocation, communication, and i also want to thank andre dehon.
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Describes master’s thesis work on an ultra-fast, hardware accelerated simulated annealing engine inventors: michael wrighton, andre dehon. A greedy algorithm for tolerating defective crosspoints in nanopla design (2005) a greedy algorithm for tolerating defective crosspoints dehon, andre thesis. Master's thesis, may 2005, pdf spatial hardware implementation for sparse graph algorithms in graphstep michael michael delorimier and andré dehon.